Metal-Oxide Semiconductor (MOS) designs have become popular in logic circuit designs for numerous reasons including their noise immunity, operability over wide voltage ranges and other properties. The most common types of transistors used include NMOS and PMOS. Although historically, the PMOS transistor was developed first with large-scale production after 1967, the n-type MOSFET (NMOS) is more widely used because the mobility for electrons is 2 to 2.5 times that of holes. In other words, the "On" resistance for a p-type MOSFET is 2 to 2.5 times greater than the "On" resistance for an n-type MOSFET. Thus, to achieve a given resistance for a particular "On" state, an n-type MOSFET will require less than about half the area of a corresponding p-type MOSFET. Along with this reduction in size and increased packing density, lower capacitance is also achieved with an n-type MOSFET resulting in higher switching speeds in digital circuits. As is known, size, speed, and power consumption are some of the key elements in equipment designs today. Consequently, these natural physical characteristics of NMOS transistors deem NMOS transistors generally attractive as compared to PMOS transistors.
However, PMOS transistors are not entirely replaceable. Designs such as complimentary metal-oxide semiconductors (CMOS) require both n-type and p-type MOSFETs. Consequently, there is a need in the art for a method of fabricating ultra-shallow p-type junctions with low sheet resistance. Sheet resistance for a material is expressed as a function of layer thickness and conductivity. Thus, in general, the more thick the layer and higher the concentration the lower the sheet resistance. To eliminate short channel effects, it is necessary to have shallower junctions as device channel length is scaled down.
A p-type MOSFET is generally achieved by doping an intrinsic silicon sample with a small amount of a Column III element of the periodic table such as for example boron, gallium, or indium to create a crystalline structure. Column III elements have one too few electrons to participate in covalent bonding with surrounding silicon. To complete the covalent bond structure, an electron is attracted from the valence band and the Column III element becomes a charged negative ion. Thus, the Column III element is sometimes called an acceptor for acquiring an electron. When an electron is removed from the valence band, a net positive charge which can effectively move under the application of an external electric field is left in the valence band thus creating a hole. Because electrons are minority carriers and holes are majority carriers, current conduction in the acceptor-type MOSFET or the p-type MOSFET is primarily via holes.
When designing a p-type MOSFET low energy indium implantation is seldom chosen because it is too difficult to use in the formation of ultra-shallow junctions as a result of the indium out-diffusing almost completely during annealing. On the other hand, boron is typically employed in ultra-shallow junction formation. However, to obtain ultra shallow p-type junctions using boron is rather difficult. Boron is a light atom (atomic weight 10.81) and is subject to significant channeling and enhanced diffusion. It is essential to scale down junction depth as the channel length is scaled down. Deeper junctions lead to adverse short channel effects which degrade transistor performance. More particularly, channeling occurs during implantation before heat treatment. Theoretically, boron should distribute around a projected range, or a center of distribution in accordance with a standard of deviation for distribution. However, due to boron's light weight the boron atom may travel further and deeper during implantation via the channels than desired notwithstanding being implanted at a low energy level.
Enhanced diffusion of boron refers to the unusually high diffusivity of boron even when minimum heat treatment is applied. The movement of boron due to an initial temperature treatment far exceeds the diffusion due to heat treatment alone. This is due to pairing of boron atoms with silicon interstials (e.g., silicon atoms that have been knocked off their positions from the silicon lattice structure). This pairing occurs in both horizontal and vertical directions, and occurs during the first heat treatment step. Thereafter, the Si interstitials recombine and no more Si interstitials are available for pairing with boron during subsequent heat treatment steps. Thus, during subsequent heat treatment steps, boron undergoes only normal thermal diffusion (and not enhanced diffusion).
Reduction of sheet resistance has been conventionally attempted by higher implant dosage levels. However, since channeling and enhanced diffusion lead to deeper junctions in the conventional approach, formation of shallower junctions is associated with reduction in dosage levels and peak concentration and hence higher sheet resistance. Moreover, limitations have been reached with respect to present implant equipment capabilities and boron's light atomic weight. Even with energy reduced down to the extent of today's technology at about 5 keV, the light boron atoms can still travel further than desired, (e.g., the normal distribution of a projected range) creating a junction deeper than desired. Moreover, suitable control of an implant beam becomes increasingly difficult to achieve as implant energy levels are reduced.
Thus, the difficulty in fabrication of p-type transistors results from the inherent limitations imposed by the characteristics of the Column III elements. As discussed above, channeling and enhanced diffusion will result in deeper than desired junctions, leading to degradation of short channel effects. However, to obtain shallower junctions using conventional techniques (having reduced dosage levels), the resulting junctions would have high sheet resistance which may lead to poor drive current characteristics. Consequently, there is a need in the art for a method to fabricate ultra-shallow p-type junctions with reduced dopant implant channeling effects and reduced enhanced diffusion of dopant implants and still provide for a p-type transistor having low sheet resistance.